The present disclosure relates generally an integrated circuit device and, more particularly, to a high surface dopant concentration semiconductor device and method of fabricating.
The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed. In the course of integrated circuit evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs.
However, such scaling-down causes a need for smaller device contacts. Smaller device contacts may lead to reduced device performance by having a relatively high resistance. Conventional methods fabricate such contacts using silicon germanium (SiGe) and provide a boron (B) implant using in-situ processes to reduce resistance. Benefits of such EPI in-situ implants are limited because they only produce a low concentration surface profile. In other words, conventional beam line implant can not deliver a high surface concentration dopant profile.
Thus, it is desirable to have an improved high surface dopant concentration semiconductor device and method of fabricating, which address one or more of the issues discussed above.